sysinfo

type CPU struct {

	// Proc is the processor number, usually zero-indexed.
	//
	// Matches: processor
	Proc int `json:"processor"`
	// BogoMIPS is a Linux-specific rough measurement of CPU
	// performance.
	//
	// Matches: BogoMIPS, bogomips
	BogoMIPS float64 `json:"bogomips,omitempty"`
	// Features is the set of supported CPU features or flags.
	//
	// Matches: Features, flags
	Features []string `json:"features,omitempty"`
	// Rev is the CPU "stepping" or revision.
	//
	// Matches: CPU revision, stepping
	Rev int `json:"revision,omitempty"`
	// ModelName is the human-readable CPU model name.
	//
	// Matches: model name
	ModelName string `json:"model_name,omitempty"`
	// MicroArch is the CPU's microarchitecture.
	MicroArch string `json:"micro_arch"`

	// Impl is the CPU implementer.
	//
	// Matches: CPU implementer
	Impl Implementer `json:"implementer,omitempty"`
	// Arch is the CPU architecture.
	//
	// Matches: CPU architecture
	Arch int `json:"arch,omitempty"`
	// Variant is the CPU variant.
	//
	// Matches: CPU variant
	Variant int `json:"variant,omitempty"`
	// Part identifies the specific CPU.
	//
	// Matches: CPU part
	Part Part `json:"part_number,omitempty"`

	// VendorID identifies the CPU vendor.
	//
	// Typically is "GenuineIntel" for Intel CPUs and
	// "AuthenticAMD" for AMD CPUs.
	//
	// Matches: vendor_id
	VendorID string `json:"vendor_id,omitempty"`
	// Family is the CPU family.
	//
	// Matches: cpu family
	Family int `json:"family,omitempty"`
	// Model is the CPU model number.
	//
	// Matches: model
	Model int `json:"model_number,omitempty"`
	// Microcode is the CPU's microcode version.
	//
	// Matches: microcode
	Microcode int `json:"microcode_version,omitempty"`
	// Freq is the CPU frequency in MHz.
	//
	// Matches: cpu MHz
	Freq float64 `json:"frequency_mhz,omitempty"`
	// Cache is the CPU's cache information.
	Cache Cache `json:"cache,omitempty"`
	// PhysID is the physical ID of this CPU core.
	//
	// Matches: physical id
	PhysID int `json:"physical_id,omitempty"`
	// Siblings is the number of sibling CPUs.
	//
	// Matches: siblings
	Siblings int `json:"siblings,omitempty"`
	// CoreID is the unique ID of this CPU core.
	//
	// Matches: core id
	CoreID int `json:"core_id,omitempty"`
	// Cores is the number of CPU cores.
	//
	// Matches: cores
	Cores int `json:"num_cores,omitempty"`
	// APICID is the APIC system's unique ID.
	//
	// Matches: apicid
	APICID int `json:"apic_id,omitempty"`
	// InitAPICID is the APIC system's unique ID as assigned at
	// startup.
	//
	// Matches: initial apicid
	InitAPICID int `json:"initial_apic_id,omitempty"`
	// FPU is whether the CPU has floating-point unit.
	//
	// Matches: fpu
	FPU bool `json:"fpu,omitempty"`
	// FPUExceptions is whether the CPU supports floating-point
	// unit exceptions.
	//
	// Matches: fpu_exceptions
	FPUExceptions bool `json:"fpu_exceptions,omitempty"`
	// CPUID level is the maximum CPUID level that can be used
	// when querying the CPU for information via the CPUID
	// instruction.
	//
	// Matches: cpuid level
	CPUIDLevel int `json:"cpuid_level,omitempty"`
	// WP is whether the CPU supports write protection.
	//
	// Matches: wp
	WP bool `json:"write_protection,omitempty"`
	// Bugs the set of bugs that have been detected or worked
	// around.
	//
	// Matches: bugs
	Bugs []string `json:"bugs,omitempty"`
	// AddrSizes are the CPU's memory address sizes.
	//
	// Matches: address sizes
	AddrSizes struct {
		// Phys is the number of bits in a physical memory
		// address.
		Phys int `json:"physical_bits,omitempty"`
		// Virt is the number of bits in a virtual memory
		// address.
		Virt int `json:"virtual_bits,omitempty"`
	} `json:"address_sizes,omitempty"`
	// PowerMgmt is the supported power management features.
	//
	// Matches: power management.
	PowerMgmt string `json:"power_management,omitempty"`

	// TLB is the CPU's Translation Lookaside Buffer.
	//
	// Matches: TLB size
	TLB struct {
		// N is the number of TLB pages.
		N int `json:"num_pages,omitempty"`
		// PageSize is the size in bytes of each page.
		PageSize int `json:"page_size,omitempty"`
	} `json:"tlb,omitempty"`
}

type Cache struct {
	// Inst is the size in bytes of the CPU's instruction
	// cache.
	Inst int `json:"instruction,omitempty"`
	// L1Data is the size in bytes of the CPU's L1 data
	// cache.
	L1 int `json:"l1,omitempty"`
	// L2 is the size in bytes of the CPU's L2 cache.
	//
	// Matches: cache size
	L2 int `json:"l2,omitempty"`
	// L3 is the size in bytes of the CPU's L3 cache.
	L3 int `json:"l3,omitempty"`
	// Alignment is how the CPU caches are aligned.
	//
	// Matches: cache_alignment
	Alignment int `json:"alignment,omitempty"`
	// Flush is the size of a cache line flush (CLFLUSH).
	//
	// Matches: clflush size
	Flush int `json:"flush,omitempty"`
}

type Implementer uint8

type Info struct {
	// CPUs is per-cpu information.
	//
	// CPUs is sorted by the Proc field in asending order.
	CPUs []CPU
	// Misc is any unknown information.
	//
	// Misc is sorted by the Key field in asending order.
	Misc []Pair
}

type Pair struct {
	Key, Value string
}

type Part uint16